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CSE 100 - 01   Logic Design

2024 Summer Quarter

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Class Details

Career
Undergraduate
Grading
Student Option
Class Number
70472
Type
Lecture
Instruction Mode
In Person
Credits
5 units
General Education
 
Status
Open
Available Seats
2
Enrollment Capacity
80
Enrolled
78
Wait List Capacity
0
Wait List Total
0

Description

Boolean algebra, logic minimization, finite-state machine design, sequential circuits, common logic elements, programmable logic devices, and an introduction to system level design. The electrical behavior of circuits including three state outputs, propagation delay, logic levels, and fanout.

Enrollment Requirements

Prerequisite(s): CSE 12.

Class Notes

All students - if you completed the prerequisites but get an error message - email your proof of prerequisite material to the instructor for approval to enroll - Ethan Sifferman, ethan@sifferman.dev.
Concurrent enrollment in CSE 100L is required. Waitlists will be based on CSE 100. Do not waitlist CSE 100L.

Meeting Information

Days & Times Room Instructor Meeting Dates
MWF 01:30PM-02:55PM J Bask Aud 101 Sifferman,E. 06/24/24 - 08/16/24
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